Update: Intel Accelerated Ireland EUV Fab Ramp-Up as Meteor Lake Chips Were In Short Supply
by Ryan Smith on August 1, 2024 8:15 PM EST- Posted in
- CPUs
- Intel
- Meteor Lake
- Intel 4
Update 08/02: Patrick Moorhead has published a further tweet, clarifying that "Pat [Gelsinger] didn’t tell me l that there were yield issues. This was *my* interpretation." The text of the article has been updated accordingly to reflect this tweet, as well as Intel statements about accelerating their Ireland Fab 34 ramp-up.
Alongside Intel’s weak Q2 2024 earnings report and the announcement of $10 billion in spending cuts and layoffs for 2025, the company is also disclosing some new information about their chip deliveries over the first half of the year. A brief report, posted on X by analyst Patrick Moorhead and citing a conversation with Intel CEO Pat Gelsinger, revealed that Intel encountered a major production bottleneck on Meteor Lake earlier this year. The issue was significant enough to drive intel to take the extraordinary and costly step of accelerating their Ireland fab ramp-up in order to improve chip capacity.
It was a very rough Q2 for $INTC. And that guide... Thanks, @Pgelsinger, for the time to discuss.
— Patrick Moorhead (@PatrickMoorhead) August 1, 2024
It appears that there were yield/throughput issues on Meteor Lake, negatively impacting gross margins. When you have to get the product to your customers, and you have wafers to… pic.twitter.com/pHU66xvFe7
-Patrick Moorhead
In a separate tweet posted several hours later, Moorhead then clarified that the yield issues mentioned in his first tweet were his interpretation of the matter, rather than something Pat Gelsinger had told him directly.
-Patrick Moorhead
Decoding Moorhead’s dense tweets, fundamentally, Moorhead is questioning why Intel's Cost of Goods Sold (COGS) – how much the company's chips cost to produce – were on the rise with the launch of Meteor Lake. The analyst surmised that yields and/or some other unexpected production bottleneck must be the case, as these are the typical issues that drive up chip COGS on a short-term basis like Intel has been experiencing.
And, judging from Intel's earnings call that took place after the initial tweet, Moorhead was right to an extent. Referencing the increased COGS, Intel CFO David Zinsner noted that Intel opted to ramp up its high-volume production in Ireland faster than initially planned. This increased Intel's capacity for Intel 4 (and Intel 3) capacity, but doing so also increased their costs, as wafers out of Ireland cost more in the near term.
-Intel CFO David Zinsner (Intel Q2'24 Earnings Call)
Between Moorhead's report that OEMs have been receiving fewer Meteor Lake chips than they could use, and Intel's announcement that they accelerated the Ireland fab ramp-up, this is the first significant disclosure that Meteor Lake chips were, at least at some point, in unexpectedly short supply. Which in turn required Intel to take unexpected and extraordinary steps in order to improve chip production, at the cost of lower short-term profit margins and higher COGS.
The first of Intel's high-volume manufacturing (HVM) fabs to be equipped for the Intel 4 and Intel 3 processes, Fab 34 in Ireland is a critical element to Intel's cutting-edge product plans over the next couple years. Intel was not initially planning on relying so much on Fab 34 this soon – instead using their Oregon development fabs to do more of their Intel 4 & Intel 3 fabrication – but the company opted to ramp up at a faster pace. The benefit to Intel is that they get more fab capacity sooner, but it means they're incurring around $1 billion in costs now of what would have otherwise been spread out over further quarters during a more gradual ramp-up.
The net result was that, while Intel took a margin hit, it also allowed them to supply more Meteor Lake chips than they otherwise would have, even beating their own previous projections for Q2 shipments. Overall, Intel reported in their Q2 earnings that they’ve shipped 15 million “AI PC” chips since Meteor Lake’s launch, though the company doesn't break down how many of those were in Q2 versus Q1 and Q4'23. Still, according to Moorhead, this was fewer chips than OEMs would have liked to have, and they would have taken more chips if they were available.
COGS and Ireland ramp-ups aside, Moorhead also posits that some of Intel's capacity boost came from running “hot lots” of Meteor Lake – high priority wafer batches that get moved to the front of the line in order to be processed as soon as possible (or as reasonably close as is practical). Hot lots are typically used to get highly-demanded chips produced quickly, getting them through a fab sooner than the normal process would take. As a business tool, hot lots are a fact of life of chip production, but they’re undesirable because in most cases they cause disruptions to other wafers that are waiting their turn to be processed.
If true, running hot lots of Meteor Lake would be a significant development given the potential disruptions. At the same time, however, the situation with Meteor Lake is somewhat particular, as the Intel 4 process used for Meteor Lake’s compute tile (the only active tile made at Intel) is not offered to external foundry customers, or even used by other Intel CPUs (Xeon 6s all use Intel 3). So hot lots of Meteor Lake would have few other wafers to even jump ahead of for EUV tooling (Intel would certainly not put them ahead of high-margin Xeon products), while it's unclear how this would cascade down to any tools shared with Intel 7.
Intel, for their part, did not comment on Meteor Lake chip yields or hot lots in their earnings call.
In any case, Intel at this point is looking to turn around their troubled fortunes in the second half of this year. The company’s next-gen client SoC for mobile, Lunar Lake, is set to launch on September 3rd. And notably, both of its active tiles are being built by TSMC. So Lunar Lake would be spared from any Intel logic fab bottlenecks, though it still has to go through Intel’s facilities for assembly using their Foveros technology. And there remains the thorny issue of higher production costs altogether, since Intel is paying for what's effectively the fully outsourced production of a Core CPU.
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TomWomack - Saturday, August 3, 2024 - link
I think Intel is precisely doing (b) - it can use chiplets to move parts of its manufacturing over to TSMC rather than having to produce low-added-value stuff on its highest-end processes. Intel's best is at least as good as TSMC's best, but it's clearly significantly more expensive for Intel.Zoolook13 - Monday, August 12, 2024 - link
"Intel's best is at least as good as TSMC's best, but it's clearly significantly more expensive for Intel." unless you consider performance per Watt of course.drwho9437 - Sunday, August 4, 2024 - link
The public commentary on Intel feels a lot like the negativity on Boeing at the moment, though it is a lot less deserved. This audience should know better. I will briefly make the case for Intel and give some context.Dennard scaling basically ended in 2001 at the 130 nm node. After that new nodes got significantly harder and expensive to make. Things continued however and at the 45 nm node we got Hf gates. These were basically made by the method IBM Research figured out. People I know figured out some of the key steps. But the point of mentioning this is a few fold. First no one company does it all, everyone has to share because it is just so expensive to make new nodes. Second, the transistor we all use for digital is a crazy mutant of exotic steps now.
After high-k gates (HfO2) and then fin fets the next big step isn't some marking name for a node. Intel 7++++ can be just as good as 0.0004 what matters is cell density and some of TSMC's appearance of leadership was for a time just marketing. But right now they are in the lead. What is the next big step is Gate all around. Samsung foundry was first to produce this.
Being first isn't the only thing that matters though, the other thing that matters is of course yield. That is why you get 3x, 3y, 3z iterative improvements at places like TSMC and 7++++ from Intel. Changes to design rules, small improvements, better performance higher yield.
Another big thing is power delivery. Backside power. Intel has this first. Ahead of Samsung and TSMC by a few years it looks like with 20A/18A. That's a very very long time in the Semiconductor space. TSMC claims theirs will be better, it could be but really they have to say that.
If you have ever designed an ASIC (I have), then you know who makes the chip does not really matter a lot, as long as the devices and cells in the library deliver on performance you like it. Of course this is the engineer talking not that CFO. That I cannot speak to. So for the technical leadership what will matter is: is this process node good? For the financials it will be does it yield.
Looking in from the outside without any NDA access to the PDKs, it looks like Intel has a winner with 18A.
But the doom mongers will say: Intel is bad. Well AMD was bad at one point. So much so they had to spin off GF. Tons of semiconductor companies have been merged. Intel was terrible with the P4 until they weren't with Core. It is a cyclical business and it would be foolish to count Intel out.
Why? Imagine you are a smart person and you love science and you just got your PhD making cool new transistors. Do you want to work in Korea, Taiwan or the US? That's really your choices, if you are from China you might have a few more. Your standard of living is going to be higher in the US. Guess what you want to work for Intel then. So Intel has this big advantage: better pay, and better talent (in principle). But until recently a much less supportive government policy. It wasn't Intel competing again TSMC or Samsung it was Intel vs the company + government policy. That's kind of a big deal. GF gave up on new nodes. IBM gave up on hardware. There is a pretty easy reason there. It isn't because the US isn't good it is because of national policy.
So on paper 18A is rather good looking in features. PDK wise I have to believe it is good too but I haven't seen it. Everyone still is flush with AI accelerator money. PDK 1.0 is out. You can bet your ass a lot of engineers are studying if they can get any advantage at all from 18A at Amazon, Microsoft and Google; probably at Apple too but maybe not due to the long standing relationship with TSMC and bankrolling the roll out of new nodes.
Lunar Lake is going to be on TSMC nodes in a month. I'm betting it will be pretty damn good. The designer side of Intel isn't dumb. The foundry side has a shot of being the leader and best again by the end of 2025. GF bled money at first horrifically. Pushing for new nodes it just so expensive now. Intel trying to go foundry shows that it is too expensive for just Intel to pay for. It takes Apple and Nvidia and AMD pre-buying supply to justify doing it.
So the question is how many foundries can the world support pushing slight improvements? 1, 2, 3, more?
Your bet is if Intel Foundry will be the next GF or if it will be the next TSMC. Remember those pesky governments. It will take until 2026 to find out. But don't under-rate the clever people Intel has, you don't see those in the quarterly results. They have to be given the resources though. Right now that's a rocky road given the capex burn, and the business need to lay so many off. They don't have anywhere to go really if they want to stay in Semis in the US; the ones that matter in R&D. They can leave the industry though.
Like AMD, I think Intel will recover (Boeing too actually), it will just take a few years.
Bruzzone - Monday, August 5, 2024 - link
Risk production data in the first 120 days of Meteor Lake pointed to a yield issue I determined on other components that was likely package related learning curve. I reported on that here at the time which got a laugh on MSI Claw handheld Intel margin sacrifice. When the ramp data shows the cost of a component at risk production (up to 5%) is $227 and does not drop below $100 until passing 23% of the run that is not ideal. Intel aims for $64 down to $53 average marginal cost. mbBruzzone - Monday, August 5, 2024 - link
I'd say Meteor is just now dropping under $80 marginal cost to produce per unit of production. mbeastcoast_pete - Monday, August 5, 2024 - link
As you seem to have cost estimates, how does that compare to, for example, i7 or i9 Raptor Lakes, especially the mobile (HX) variants?Apart from that, Intel is clearly in high volume production with Meteor Lake for a little while now, and I sometimes wonder if they won't revisit their positioning of Meteor Lake as for mobile devices only.
Bruzzone - Tuesday, August 6, 2024 - link
@eastcoastpete, after reading Anandtech Lunar Lake at B stepping report my Meteor Lake impression on channel available supply doubling +115% from May 25th through July 27th is CEO Gelsinger q2 "made to many" suggests Meteor through q2 was a final validation run like Tiger U quad before moving to Tiger U octa.There are so many Tiger U quad in the channel, mostly secondary sale now, they may never entirely be sold down but apparently thought necessary when produced before and ensuring how to fabricate a Tiger quad to effectively fabricate a Tiger octa.
Could be similar here for Meteor Lake on run down peak production subject constant learning to resolve all the primarily backend packaging glitches' before moving to Lunar Lake. Lunar I suspect will be a mirror equal distribution; Meteor run up, Lunar run down.
On Raptor desktop S similar HX $36 variable and $60 marginal cost of full run production is my take on RMA replacement cost + handling.
$1K Average Weighed Price for 14S + 13S full line + 14 HX + 13 HX full line is $385 that is an Intel Competitive profit point and the simple rule is $1K and for precision on full line $1K AWP / 8 = marginal cost = $48.
At Marginal Cost = Marginal Revenue = $192 that is gross on INTC 10Q / 4 = $64 so there's a range.
On total revenue total cost assessment from gross $52.39 that is $96 up to 5% of full run that is risk production, up to 23% marginal cost of production drops to $56 but pops to $67 pushing peak surplus volume into 74% of the run dropping to $11.62 run end variable cost of sorting the slack; $52.39 marginal cost. Marginal revenue potential is $139.61except much of that was lost in a wholesale and end sales outlet price war stepping on AMD Ryzen desktop.
mb
Bruzzone - Tuesday, August 6, 2024 - link
Whoops bit error there, $192 / 4 = $48 right stated that paragraph before so / 3 = $64 would suggest issues. Total revenue total cost assessment relies on Intel models so range $48 to $52 to $60.If a Meteor Lake production surplus gets thrown into sales packages and sent to NUCs? mb