|Do you remember how simple things used to be, when the Pentium was the thing to get if you wanted performance in a desktop? There were no low-cost Pentiums and high-end Pentiums, just the Intel Pentium processor. If you wanted a Pentium, you got just that, and if you didn't, you were left with a few other options from AMD or Cyrix.|
|Around the time when Intel made the introduction of the Pentium 133 the simple system of "you want an Intel processor? Here it is" slowly began to disintegrate with the introduction of the Pentium Pro. Intel began releasing processors for all factions of the market, ranging from absurdly high priced server processors (Xeon) to incredibly cost effective low end processors (Celeron/CeleronA) which barely offered any disadvantages compared to Intel's midrange flagship processors, the common Pentium II. After giving the market a little time to settle, it became a bit easier to pick the best processor for your needs from the bunch, however just as you thought things were getting easier Intel went right ahead and released 4 new processors. Welcome to Q1 1999, the quarter of the Celeron.|
Out with the Old and in with the Old?
Think back to May 1997, Intel had just announced that the future of the x86 microprocessor industry lay in their slot-based architecture, which debuted with the release of the Pentium II processor. The reason the Pentium II processor expanded a quickly closing gap between Intel/AMD processor performance was because of its high-speed L2 cache. If you recall from AnandTech's coverage of the AMD K6-3, the importance of cache comes into play specifically with applications that tend to make frequent use of simple functions. As mentioned in the K6-3 Review on AnandTech:
Cache is nothing more than high speed memory that is located closer to your CPU for faster access to frequently used data. The first place your CPU looks for data is in the cache, and more specifically, the cache located on the CPU itself, referred to as Level 1 or L1 cache. If the data the CPU is looking for isnt present in the L1 cache, or it fails to retrieve it in the current clock cycle, it then looks for it in the secondary cache, if present, otherwise it retrieves it from your system memory. Assuming that there is a secondary cache present (L2 cache), the processor can then retrieve it from a source slower than that of the L1 cache, yet still faster than if it had gone all the way to the system memory to retrieve the data. This process continues with however many levels of cache your system has before the processor has no other option than to retrieve the data from system memory, the slowest option out of them all.
If you recall, Intel had prior experience with migrating to a higher speed L2 cache solution, the Pentium Pro. The Pentium Pro contained anywhere from 256KB to 1024KB of L2 cache on-chip, however located off the die of the processor itself. This L2 cache operated at clock speed meaning that a 200MHz Pentium Pro had both its L1 and L2 caches running at a full 200MHz. This gave the Pentium Pro the definite edge over Intel's flagship processor at the time, the Pentium. Unfortunately, Intel showed their inexperience with this sort of integration as the Pentium Pro never truly made it as a desktop solution while it definitely could've made the transition. The Pentium Pro was a tricky part to manufacture, in that the entire processor had to be put together before final testing could be conducted on the part. If either part of the processor, the CPU itself or the L2 cache failed to pass the stability or quality tests, the entire processor had to be thrown away. This, coupled with the price of including the cache in expensive 0.35 micron real-estate and the disappointment expressed by L2 cache manufacturers (the L2 cache on the Pentium Pro had to be manufactured by Intel, keeping L2 cache manufacturers out of the product loop), left the Pentium Pro out of the hands of many and definitely soured Intel's taste on the idea of an integrated L2 cache solution on the processor.
Intel's realization that the limitation of Socket-7 systems was the 66MHz Front Side Bus (FSB) frequency (the speed which the L2 cache also happened to operate at), led them to two distinct options: 1) Introduce a higher FSB frequency standard for Socket-7 motherboards, or 2) Try another hand at moving the L2 cache off the motherboard and on to the processoror close to it.